Abstract
We discuss the Dual-Scale Topology Optoelectronic Processor (D-STOP) neural network, a scalable, optically interconnected neural network architecture. We present the tandem D-STOP system, which provides the connectivity needed for building fully-parallel neural networks with generic gradient-descent learning rules. We review the Content Addressable Network (CAN) learning algorithm, a discrete learning algorithm that provides accelerated learning with reduced hardware requirements. We then show how the CAN algorithm can be effectively mapped onto D-STOP, and we investigate associated optoelectronic hardware tradeoffs.
Original language | English (US) |
---|---|
Pages | 1998-2003 |
Number of pages | 6 |
State | Published - 1994 |
Externally published | Yes |
Event | Proceedings of the 1994 IEEE International Conference on Neural Networks. Part 1 (of 7) - Orlando, FL, USA Duration: Jun 27 1994 → Jun 29 1994 |
Other
Other | Proceedings of the 1994 IEEE International Conference on Neural Networks. Part 1 (of 7) |
---|---|
City | Orlando, FL, USA |
Period | 6/27/94 → 6/29/94 |
ASJC Scopus subject areas
- Software