TY - GEN
T1 - Optically augmented 3-D computer
T2 - 1st International Workshop on Massively Parallel Processing Using Optical Interconnections, MPPOI 1994
AU - Marchand, Philippe J.
AU - Krishnamoorthy, Ashok V.
AU - Esener, Sadik C.
AU - Efron, Uzi
N1 - Funding Information:
The authors would like to acknowledge the constructive comments and discussions with Michael Little, Joe Ford, Gary Marsden, Barmak Mansoorian, Chi Fan, and Mark Hansen. This research effort is supported by ARPA under grant F30602-93-C-0173 administered by Rome laboratory.
Publisher Copyright:
© 1994 IEEE.
PY - 1994
Y1 - 1994
N2 - In order to achieve high performance parallel computing in terms of bandwidth versus power consumption and volume, denser and faster means of implementing interconnections while minimizing power and crosstalk are required. Global interconnections can be implemented using free-space interconnect technology and can be coupled to the wafer to wafer connection system developed at Hughes Research laboratories to obtain an optoelectronic 3-D computer with increased throughputs for routing or sorting operations. To this end, the 3-D optoelectronic computing architecture needs to be designed for optimal performance, light transmitters and receivers need to be integrated with the 3-D VLSI wafer stacks to allow optical inputs and outputs, and free-space optical interconnect elements need to be assembled with the modified 3-D wafer stacks. In this paper, the underlying concepts of the technology and architecture of the optically augmented 3-D computer are evaluated.
AB - In order to achieve high performance parallel computing in terms of bandwidth versus power consumption and volume, denser and faster means of implementing interconnections while minimizing power and crosstalk are required. Global interconnections can be implemented using free-space interconnect technology and can be coupled to the wafer to wafer connection system developed at Hughes Research laboratories to obtain an optoelectronic 3-D computer with increased throughputs for routing or sorting operations. To this end, the 3-D optoelectronic computing architecture needs to be designed for optimal performance, light transmitters and receivers need to be integrated with the 3-D VLSI wafer stacks to allow optical inputs and outputs, and free-space optical interconnect elements need to be assembled with the modified 3-D wafer stacks. In this paper, the underlying concepts of the technology and architecture of the optically augmented 3-D computer are evaluated.
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U2 - 10.1109/MPPOI.1994.336632
DO - 10.1109/MPPOI.1994.336632
M3 - Conference contribution
AN - SCOPUS:85010103978
T3 - Proceedings of the 1st International Workshop on Massively Parallel Processing Using Optical Interconnections, MPPOI 1994
SP - 133
EP - 139
BT - Proceedings of the 1st International Workshop on Massively Parallel Processing Using Optical Interconnections, MPPOI 1994
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 26 April 1994 through 27 April 1994
ER -